Effect of Underlap on 30 nm Gate Length FinFET Based LNA Using TCAD Simulations
نویسندگان
چکیده
The effect of gate – drain/source underlap ( Lun ) on a narrow band LNA performance has been studied , in 30 nm FinFET using device and mixed mode simulations. Studies are done by maintaining and not maintaining the leakage current (Ioff) of the various devices. LNA circuit with two transistors in a cascode arrangement is constructed and the input impedance, gain and noise-figure have been used as performance metrics. To get the better noise performance and
منابع مشابه
Optimization of Gate – Source/Drain Underlap on 30 nm Gate Length FinFET Based LNA Using TCAD Simulations
The effect of gate – drain/source underlap (Lun) on a narrow band LNA performance has been studied, in 30 nm FinFET using device and mixed mode simulations. Studies are sssssdone by maintaining and not maintaining the leakage current (Ioff) and threshold voltage (Vth) of the various devices. LNA circuit with two transistors in a cascode arrangement is constructed and the input impedance, gain a...
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The effect of gate – drain/source underlap ( Lun ) on a narrow band LNA performance has been studied , in 30 nm FinFET using device and mixed mode simulations. Studies are done by maintaining and not maintaining the leakage current (Ioff) of the various devices. LNA circuit with two transistors in a cascode arrangement is constructed and the input impedance, gain and noise-figure have been used...
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